DSC POWER 864 - REV2 Spezifikationen PDF herunterladen (Seite 184)

PIC24F16KA102 FAMILY

R/W-0 U-0 U-0 U-0 U-0 U-0 R-0, HSC R-0, HSC

CMIDL — — — — — C2EVT C1EVT

bit 15 bit 8

U-0 U-0 U-0 U-0 U-0 U-0 R-0, HSC R-0, HSC

— — — — — — C2OUT C1OUT

bit 7 bit 0

Legend: HSC = Hardware Settable/Clearable bit

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 15 CMIDL: Comparator Stop in Idle Mode bit

1 = Discontinue operation of all comparators when device enters Idle mode

0 = Continue operation of all enabled comparators in Idle mode

bit 14-10 Unimplemented: Read as ‘0’

bit 9 C2EVT: Comparator 2 Event Status bit (read-only)

Shows the current event status of Comparator 2 (CM2CON<9>).

bit 8 C1EVT: Comparator 1 Event Status bit (read-only)

Shows the current event status of Comparator 1 (CM1CON<9>).

bit 7-2 Unimplemented: Read as ‘0’

bit 1 C2OUT: Comparator 2 Output Status bit (read-only)

Shows the current output of Comparator 2 (CM2CON<8>).

bit 0 C1OUT: Comparator 1 Output Status bit (read-only)

Shows the current output of Comparator 1 (CM1CON<8>).

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DSC POWER 864 - REV2 Spezifikationen Seite 184